In the fabrication of semiconductor and electronic devices there is an on-going need to reduce packaging costs. Package sizing is also important, especially the profile or height of the package, when mounted to a printed wiring board or printed circuit board. Complicating the situation is the increasing complexity of electronic components such as integrated circuits which require a high pin count package to electrically connect the device to a user system.
Electronic circuits for complex systems such as digital computers typically are comprised of a multiplicity of interconnected integrated circuit chips. The integrated circuit chips are made from a semiconductor material such as silicon or gallium arsenide, and microscopic circuits are formed on the top surface of the chips by photolithographic techniques. In a conventional form of construction, the integrated circuit chips are mounted in respective ceramic packages, and the ceramic packages are mounted on a printed wiring board or printed circuit board.
Plastic integrated circuit packages have evolved as a cost effective replacement for ceramic packages. Modern laminate based molded plastic packages offer electrical, thermal and design performance that matches and often times exceeds that of ceramic packages at a lower cost. Electrically, laminate substrates have a clear advantage over co-fire ceramic with both lower resistance wiring and lower dielectric constant. Essentially, electrical designs can be implemented in less than half the volume (and half the number of layers) as an equivalent ceramic based design.
Plastic encapsulation of semiconductor and electronic devices by transfer molding is a well-known and much used technique. In a typical situation, a large number of components or devices are placed in an open multi-cavity mold, one or more devices in each cavity. When the mold is closed the two mold portions, usually called "platens" or "halves", come together around the devices. The many cavities in the mold are connected by a tree-like array of channels (i.e., runners) to a central reservoir (i.e., pot) from which the plastic is fed. Usually, "gates" (i.e., constricted channels) are placed just at the entrance to each cavity to control the flow and injection velocity of the plastic into the cavity, and to permit easier removal from the finished part of the material which has solidified in the runners.
Typically, powdered or pelletized plastic is placed in the central reservoir and compressed by a ram. The mold and reservoir are usually hot. The combination of heat and pressure causes the plastic to liquify and flow through the runner-tree and gates into the individual mold cavities, where it subsequently hardens. The mold halves are then separated and the encapsulated parts are removed and trimmed of excess plastic left in the runners and the gates.
Heat sinks have been added to plastic molded electronic packages as described in U.S. Pat. No. 4,868,349 issued to Chia. The heat sink provides more efficient heat removal in a plastic molded electronic package. The heat sink in Chia is attached in the following manner. A printed wiring board is prepared to have a plurality of package contacts (i.e., pins) secured to extend from one face in the form of a pin grid array. The printed wiring board has a cut-out region in its center and a copper heat sink is secured to the board to span the cut-out region on the opposite face of the board. A semiconductor (or electronic) device is then secured to the heat sink in the cavity created by the cut-out region. The bonding pads of the semiconductor device are then electrically connected to the traces on the printed wiring on the board that are joined to the package contacts. The printed wiring board of Chia is also provided with a plurality of holes located next to and outboard of the heat sink.
The assembly is then located in a transfer mold composed of a pair of opposing platens. A first platen has a first cavity that accommodates the package contacts and this cavity includes edges that bear against the printed wiring board adjacent to the pins. A second cavity is located in the first platen to span the holes in the board adjacent to the heat sink. The second or opposing platen has a cavity that spans the printed wiring board and is deep enough to accommodate the heat sink. It also contains a series of ribs that engage the printed wiring board so as to precisely locate it inside the platen and to press against the board periphery so as to force it against the first platen. It also contains runners and gates through which fluid plastic can be entered in a transfer molding process.
When fluid plastic is forced through the runners and gates, it enters the second cavity and covers the board adjacent to the heat sink but is precluded from coating the heat sink by virtue of contact with the platen cavity face. The fluid plastic fills the platen cavity around the heat sink and also flows through the holes in the board thereby to cover the semiconductor device inside the second cavity. The mold becomes filled with plastic which acts to encapsulate the printed wiring board and the housed semiconductor device. After transfer molding and partial cure of the encapsulant, the device can be removed from the mold and the cure completed. After curing, any flash is removed in the usual manner and the device is ready for use.
The Chia method has some particular advantages but likewise has certain limitations. First, the thickness of the printed wiring board can vary by as much as .+-.5 mils, whereas the height of the cavity between the first platen and second platen when they are brought together is fixed. The results being that if the printed wiring board is 5 mils too thick, as the mold is closed the heat sink and printed wiring board will be deflected into the second cavity, particularly because the heat sink width is smaller than the second cavity width, therefore there is no support below the printed wiring board in the heat sink area to resist the deflection. Then after the mold is opened, the pressure is released and the printed wiring board and heat sink return to their initial position. As a result, the heat sink is no longer flush with the top of the plastic encapsulant and cracks develop in the plastic at the heat sink-plastic interface. If the printed wiring board is 5 mils too thin, as the mold is closed there will be a 5 mil gap between the top of the heat sink and the inside surface of the cavity above the heat sink. As a result, plastic will flow over the heat sink and encapsulate it.
A second limitation of the Chia package is that the heat sink has to be relatively small so that the access holes through the board will be inboard of the package pin contacts but not covered up by the heat sink. The relatively small heat sink limits cooling of the package and limits the size of an external heat sink that a customer may wish to add to the package for additional cooling.
For integrated circuit (IC) plastic packaging, the IC chip is usually encapsulated because it is the lowest cost. Using a lid for encapsulating is typically used if the IC chip cannot tolerate the stresses of mold or liquid compound on the surface of the die. Encapsulation using liquid compound is another common method. This process is also known as "glob top" or potting.
The difference between glob top and potting methods is that the glob top is "self-crowning" liquid encapsulation. The potting method is more cosmetically appealing than the glob top method, but the potting method needs a "dam" or potting ring to prevent the encapsulating liquid from flowing in unwanted areas and therefore adds cost. The potting ring is typically separate from the printed wiring board and attached using an adhesive. Because the potting ring is separate from the printed wiring board, there is added cost of handling two individual pieces and the adhesive to make it one unit. An alternative method of applying a potting ring is screen printing. However, there are height and height tolerance limitations.